The system ended up as three separate Eurocards (100x160mm) with DIN41612 A/C connectors. The bus pinouts were chosen to minimise routing problems. All PCBs are single sided, with parallel vertical wire jumpers on the component side. PCB layout was done using smARTWORK.
Card 1 : 68000, Interrupt logic, clock, buffers on all data and address
lines.
Card 2 : 64K ram, 192K rom (total of eight 256 kbit devices). This card
contains logic to map the rom to $000000 for the first 4 cycles after RESET.
This allows the processor to pick up the reset vectors, while the bottom 64K
of the memory map contains RAM during normal operation.
Card 3 : 2 x UARTS, Parallel port, Timer.
The software development cycle was fun. (OK, so I'm a masochist :-). I used to write assembler code, hand-compile it, type it into a PC, burn two EPROMs, and then take the EPROMs home and stick them in the system. Single-stepping the 68000 is easy since the whole chip is CMOS. The 68K will wait for the data acknowledge signal DTACK forever. I wire-wrapped a fourth card with LEDs on all data and address lines, and a flip-flop wired to a switch to take DTACK low for one cycle at a time. I got a small monitor working this way, but I wouldn't recommend it :-). I also typed in a crossassembler (in Modula 2) from Dr. Dobbs, and wrote my own disassembler in C. Eventually I got hold of a copy of Dr. Dobbs Tiny Basic for the 68000, which works great. I wanted to put Forth on there, but I got busy with other things, so it never happened.
Some day I might resurrect this system and make something like Peter Stark's SK*DOS run on it.
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